A practical encrypted microprocessor

Conference item


Breuer, PT, Bowen, JP, Palomar, E and Liu, Z (2016). A practical encrypted microprocessor. IEEE Proceedings of the 13th International Joint Conference on e-Business and Telecommunications. Lisbon, Portugal 26 - 28 Jul 2016 London South Bank University. doi:10.5220/0005955902390250
AuthorsBreuer, PT, Bowen, JP, Palomar, E and Liu, Z
Abstract

Copyright © 2016 by SCITEPRESS - Science and Technology Publications, Lda. All rights reserved.This paper explores a new approach to encrypted microprocessing, potentiating new trade-offs in security versus performance engineering. The coprocessor prototype described runs standard machine code (32-bit OpenRISC v1.1) with encrypted data in registers, on buses, and in memory. The architecture is 'superscalar', executing multiple instructions simultaneously, and is sophisticated enough that it achieves speeds approaching that of contemporary off-the-shelf processor cores. The aim of the design is to protect user data against the operator or owner of the processor, and so- called 'Iago' attacks in general, for those paradigms that require trust in data-heavy computations in remote locations and/or overseen by untrusted operators. A single idea underlies the architecture, its performance and security properties: it is that a modified arithmetic is enough to cause all program execution to be encrypted. The privileged operator, running unencrypted with the standard arithmetic, can see and try their luck at modifying encrypted data, but has no special access to the information in it, as proven here. We test the issues, reporting performance in particular for 64-bit Rijndael and 72-bit Paillier encryptions, the latter running keylessly.

Year2016
JournalICETE 2016 - Proceedings of the 13th International Joint Conference on e-Business and Telecommunications
PublisherLondon South Bank University
Journal citation4, pp. 239-250
Digital Object Identifier (DOI)doi:10.5220/0005955902390250
Accepted author manuscript
License
CC BY 4.0
Publication dates
Print26 Jul 2016
Publication process dates
Deposited03 Jul 2017
Accepted26 Jul 2016
ISBN9789897581960
Permalink -

https://openresearch.lsbu.ac.uk/item/87310

  • 0
    total views
  • 9
    total downloads
  • 0
    views this month
  • 6
    downloads this month

Related outputs

Fully encrypted high-speed microprocessor architecture: The secret computer in simulation
Breuer, PT and Bowen, JP (2019). Fully encrypted high-speed microprocessor architecture: The secret computer in simulation. International Journal of Critical Computer-Based Systems. 9 (1-2), pp. 26-55.
The Secret Processor Will Go to the Ball: Benchmark Insider-Proof Encrypted Computing.
Breuer, PT, Bowen, JP, Palomar, E and Liu, Z (2018). The Secret Processor Will Go to the Ball: Benchmark Insider-Proof Encrypted Computing. 2018 IEEE European Symposium on Security and Privacy Workshops. 23 - 27 Apr 2018 IEEE. pp. 145-152 doi:10.1109/EuroSPW.2018.00027
Encrypted computing: Speed, security and provable obfuscation against insiders
Breuer, PT, Bowen, JP, Palomar, E and Liu, Z (2017). Encrypted computing: Speed, security and provable obfuscation against insiders. International Carnahan Conference on Security Technology. Madrid, Spain 23 - 26 Oct 2017 London South Bank University. doi:10.1109/CCST.2017.8167847
On obfuscating compilation for encrypted computing
Breuer, PT, Bowen, JP, Palomar, E and Liu, Z (2017). On obfuscating compilation for encrypted computing. 14th International Conference on Security and Cryptography. Madrid, Spain 24 - 26 Jul 2017 London South Bank University.
A Fully Encrypted Microprocessor: The Secret Computer is Nearly Here
Breuer, PT and Bowen, JP (2016). A Fully Encrypted Microprocessor: The Secret Computer is Nearly Here. Procedia Computer Science. 83, pp. 1282-1287.
An Open Question on the Uniqueness of (Encrypted) Arithmetic
Breuer, PT and Bowen, JP (2013). An Open Question on the Uniqueness of (Encrypted) Arithmetic. International Conference on Computational Science. Barcelona, Spain 05 - 07 Jun 2013 London South Bank University.
Empirical Patterns in Google Scholar Citation Counts
Breuer, PT and Bowen, JP (2014). Empirical Patterns in Google Scholar Citation Counts. 2014 IEEE 8th International Symposium on Service Oriented System Engineering. 07 - 11 Apr 2014 IEEE. doi:10.1109/SOSE.2014.55
Certifying Machine Code Safe from Hardware Aliasing: RISC is not necessarily risky
Breuer, PT and Bowen, JP (2013). Certifying Machine Code Safe from Hardware Aliasing: RISC is not necessarily risky. International Conference on Software Engineering and Formal Methods. Madrid, Spain London South Bank University. doi:10.1007/978-3-319-05032-4_27
On the Security of Fully Homomorphic Encryption and Encrypted Computing: Is Division safe?
Breuer, PT and Bowen, JP (2014). On the Security of Fully Homomorphic Encryption and Encrypted Computing: Is Division safe? arXiv.