Electromigration in Integrated Circuit Interconnects

Electromigration is the principal wearout mechanism in integrated circuit metallisation tracks. This thesis is concerned with electromigration measurements made on samples using the Temperature Ramp Resistance Analysis (TRACE) technique. This has been carried out at low temperatures and in a normal atmosphere. As the dimensions of the tracks become smaller and smaller electromigration becomes a larger factor in determining semiconductor device lifetime. The effects the physical parameters such as grain size and distribution, length, width, thickness, passivation and metallisation have on the lifetime of semiconductor devices have been reviewed, together with the different types of measurement methods; lifetime, mass distribution, hole formation, resistance techniques and wafer level tests. TRACE was chosen from among these due to its short test time of several hours compared to several months for lifetime test and because it can give both the activation energy for electromigration and the pre-exponential in the Black derived formula for electromigration lifetime. Experimental realisation involved modifying an oven, designing and building electronic circuitry for the constant current sources used for current stressing of the samples, building interface circuits between an oven controller and a BBC Master microcomputer and multiplexing of sample voltages to a voltmeter. Software to control the oven temperature and the sample voltage measurements was developed and validated. | The measurement results followed the general trend of other electromigration results. This realisation of the TRACE method was able to monitor changes in sample resistances, but the resulting activation energies produced were lower than those predicted by others.