Design And Realization Of Switched Capacitor Filters

PhD Thesis

Yassine, Hatem (1985). Design And Realization Of Switched Capacitor Filters. PhD Thesis Council for National Academic Awards Department of Electrical and Electronic Engineering, Polytechnic of the South Bank
AuthorsYassine, Hatem
TypePhD Thesis

Discrete-time signal processing has been investigated for designing and realizing high-precision high-order filters using switched capacitor (SC) techniques. In this technique, capacitor ratios and sampling frequency are the precision elements. The resulting circuits possess analogue properties, and yet they are inherently discrete-time devices, being described, analyzed and synthesized in the discrete-time z-plane. The first criterion adopted is that discrete-time z-plane functions should preserve the frequency characteristics of their continous-time s-plane counterparts. A general analogue to digital transformation for preserving the frequency characteristics is developed. This general transformation is based upon analyzing a number of fictitious samples between each pair of consecutive physical samples. Then, a novel approach to the digitization of continous-time filters by mapping the poles and zeros of their s-plane transfer or characteristic functions is introduced. The second criterion adopted is that synthesized discrete-time lossless passive ladder prototypes should be realizable exactly using discrete-time techniques (SC or digital). This approach starts with any realizable z-plane transfer function irrespective of the s-z transformation used in deriving it, from which the ABCD matrix parameters for an equivalent discrete-time lossless ladder prototype are obtained. The proposed synthesis method is carried out by introducing a discrete-time frequency transformation which maps the z-plane onto another discrete-time plane. Furthermore, in this thesis, bilinearly-transformed s-plane RLC ladder prototypes are investigated to realize exact SC ladder filters using conventional parasitic insensitive lossless discrete-time integrator (LDI) and proposed bilinear SC integrators. Finally, two SC ladder filter structures are described which allow amplifiers to be time-shared using conventional two-phase clocking to realize two poles of filtering per amplifier in comparison to conventional ladder filters which require one amplifier per pole of filtering

PublisherLondon South Bank University
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Deposited30 Oct 2023
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